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- Introduction
Quick Facts
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Medium of instructions
English
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Mode of learning
Self study
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Mode of Delivery
Video and Text Based
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Course and certificate fees
Fees information
₹ 499 ₹2,699
certificate availability
Yes
certificate providing authority
Udemy
The syllabus
Introduction
Crosstalk- Why and How Crosstalk occurs in a CHIP?
- High Routing Density
- Dominant Lateral Capacitance
- Introduction to Noise Margin
- Noise Margin Voltage Parameters
- Noise Margin equation and Summary
- Lower Supply Voltage
Glitch Example and Factors Affecting Glitch Height
- Basic Crosstalk Glitch Example
- Glitch Discharge With High Drive Strength NMOS Transistor
- Glitch Discharge With High Drive Strength PMOS Transistor
- Factors Affecting Glitch Height - Spacing
- Factors Affecting Glitch Height - Aggressor Drive Strength
- Factors Affecting Glitch Height - Victim Drive Strength
- Factors Affecting Glitch Height - Conclusion
Tolerable Glitch Heights and Introduction to AC Noise Margin
- Impacts Of Glitch
- Introduction to Safe and Unsafe Glitches
- Tolerable Glitch Heights using DC Noise Margin
- Tolerable Glitch Heights using DC Noise Margin Continued
- AC Noise Margin
- Impact of Load on Glitch Height
- Justification of Load Impact and Conclusion
Timing Windows
- Single Victim Multiple Aggressors
- Introduction to Timing Window
- Timing Window Formation
- Bucketization based on Timing Windows
- Final Glitch Calculation
Crosstalk Delta Delay Analysis
- Crosstalk Delta Delay - Aggressor Victim Switching in Opposite Direction
- Impact of Crosstalk Delta Delay on Clock Skew
- Setup Timing Analysis Using Real Clocks
- Impact of Crosstalk Delta Delay on Setup Timing
- Crosstalk Delta Delay - Aggressor Victim Switching in Same Direction
- Hold Timing Analysis Using Real Clocks
- Impact of Crosstalk Delta Delay on Hold Timing
Noise Protection Technique
- Shielding
- Spacing
- Drive Strength
Power Supply Noise and Power Mesh Solution
- Introduction To Power Supply Noise
- Need of Decoupling Capacitors (DECAPS)
- Power Supply Noise With Multiple Instantiations
- Voltage Droop And Ground Bounce
- Power Mesh Solution
Summary
- Summary
Quiz and Evaluation
- Which Capacitance is dominant for 0.1um and below process
- What is the NMH and NML of the below Noise Curve ?
- Which of the below scenario is correct ?
- Which Scenario impacts the Victim "the least" ?
- Mark Potentially Unsafe Glitches among the below !!
- Identify Potentially Safe Glitches !!
- which of below bucket/s are prone to glitch ?
- What is the Setup Slack between 'A' and 'B' ? (Clock Period 'T' = 70ps)
- What is Hold Slack between 'B' and 'C' ?
Instructors
Mr Kunal Ghosh
Director, instructors
Freelancer
M.E /M.Tech.
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