UPES B.Tech Admissions 2025
ApplyRanked #42 among Engineering colleges in India by NIRF | Highest CTC 50 LPA , 100% Placements
Total Fees 3.75 L | Exam GATE | Seats 18 |
₹ 3.75 L
MODE
Full timeDURATION
24 MonthsMaster of Technology in Embedded System and VLSI Design is two years (4 Semester) full-time postgraduate engineering program offered by Jain University, Bangalore and approved by AICTE.
Exams and Events | Dates |
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GATE Admit Card Date (Mode - Online) | 6 Jan'25 - 6 Jan'25 |
GATE Exam Date (Mode - Online) | 31 Jan'25 - 1 Feb'25 |
GATE Exam Date (Mode - Online) | 14 Feb'25 - 15 Feb'25 |
GATE Result Date (Mode - Online) | 18 Mar'25 - 18 Mar'25 |
GATE Score Card Date (Mode - Online) | 27 Mar'25 - 30 May'25 |
GATE Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'25 - 30 Dec'25 |
Candidates who have passed the BE / B.Tech with an aggregate of 50% of all the years/semesters are eligible to apply. (45% in the qualifying examination in case of SC, ST).
GATE, JET or any valid entrance score is preferred.
Embedded Systems Technologies - B.E. or B.Tech or AMIE in Electronics and Communication Engineering / Electrical and Electronics Engineering / Electronics and Instrumentation Engineering / Instrumentation and Control Engineering / Electronics and Telecommunication Engineering / Computer Science Engineering / Information Science Engineering / Medical Electronics Engineering.
Students will be selected on the basis of:
Ranked #42 among Engineering colleges in India by NIRF | Highest CTC 50 LPA , 100% Placements
Ranked #1 Among all Private Indian Universities In QS Asia Rankings 2025 | Scholarships worth 210 CR
Gateway for admissions to Engineering courses @ Symbiosis
1st in NPTEL program of 6 IITs | Highest CTC 72 LPA | Scholarships to meritorious students
National level exam conducted by VIT University, Vellore | Ranked #11 by NIRF for Engg. | NAAC A++ Accredited
Apply for Online EMBA from IIM Sirmaur