Total Fees 3.80 L | Exam GATE | Seats 18 |
₹ 3.80 L
MODE
Full timeDURATION
24 MonthsMaster of Technology in VLSI Design and Embedded Systems is two years full-time postgraduate course and it is offered by Savitribai Phule Pune University, Pune.
| Exams and Events | Dates |
|---|
GATE Exam Date (Mode - Online) | 6 Feb'26 - 7 Feb'26 |
GATE Exam Date (Mode - Online) | 13 Feb'26 - 14 Feb'26 |
GATE Result Date (Mode - Online) | 18 Mar'26 - 18 Mar'26 |
The admission shall be on the basis of GATE score.