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I would like to know Admission procedure and gate cuttoff for ECE students for vlsi course


siva R 20th Feb, 2018
Answer (1)
ram kumar chugh 1st Apr, 2018

M.Tech. in VLSI Design is a 2- year postgraduate course, which fundamentally covers the engineering aspects involved in designing and developing IC-based systems, and is divided into four semesters of six months each.

For admission to the course, candidates need to have a completed graduation (B.E/B. Tech.) from a recognized university. The average annual fee charged in India for the course ranges between INR 1 and 5 Lacs, varying across institutes.

Upon successful completion of the course, such postgraduates are lucratively employed in both public and private sector organizations such as Intel, Samsung, AMD, etc. with an initial average annual salary ranging between INR 3 and 8 Lacs, depending upon the candidate’s expertise in the field.

M.Tech. in VLSI Design: Course Highlights

Tabulated below are some of the major highlights of the course.

Course Level Postgraduate
Duration 2 Years
Eligibility Graduation degree in B.E/B. Tech
Admission Process Counseling after taking entrance test
Course Fee INR 1 to 5 Lacs
Average Starting Salary INR 3 to 8 Lacs
Major entrance exams GATE, BITSAT, GGSIPU, etc.
Examination Type Semester System
M.Tech. in VLSI Design: What is it About?

The course is a multidisciplinary combination of two streams, namely Material Science and Electrical Engineering, and involves advanced lessons in concepts and processes of creating an integrated circuit (IC) by combining thousands of transistors into a single chip.

M.Tech. in VLSI Design: Admission Process

The admission process for the course is varied, as various institutes have their very own criteria and processes of admission. Admission to the course is often based on the candidate’s performance in a relevant entrance exam, followed by a round of counselling, wherein the student’s general aptitude for the course is examined, and based on performance in which, students are admitted.

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