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Quick Facts

Total Fees
1.77 L
Exam
GATE
Seats
19

Fees Details

General

â‚ą 1.77 L

Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

Course Details

MODE

Full time

DURATION

24 Months

Master of Technology (M.Tech) in Microelectronics and VLSI Design is a two-year (4 semesters) full-time postgraduate program offered by the Department of Electronics and Communication Engineering at National Institute of Technology Sikkim.


Important dates

Exams and EventsDates
GATE
Application Correction Date (Mode - Online)
30 Oct'24 - 19 Nov'24
GATE
Score Card Date - Score cards available for download by paying a fee of Rs. 500 per test paper (Mode - Online)
31 May'24 - 30 Dec'24
GATE
Admit Card Date (Mode - Online)
1 Jan'25 - 1 Jan'25
GATE
Exam Date (Mode - Online)
31 Jan'25 - 1 Feb'25
GATE
Exam Date (Mode - Online)
14 Feb'25 - 15 Feb'25
GATE
Result Date (Mode - Online)
18 Mar'25 - 18 Mar'25
GATE
Score Card Date (Mode - Online)
27 Mar'25 - 30 May'25
GATE
Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online)
31 May'25 - 30 Dec'25

Eligibility Criteria

Minimum 60% or CGPA 6.5 (out of 10) in B. Tech. in ECE / EEE; OR Minimum 55% or CGPA 6.0 in M. Sc in Electronic Science;

Admission Details

Admissions are done on the basis of GATE Exam

Applications for Admissions are open.

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News and Notifications
1 days ago :

Last date for the GATE 2025 application form correction is November 20, 2024. 

1 days ago :

JEE Main 2025 registrations are ongoing and last date to apply is November 22, 2024. 

1 days ago :

JAM 2025 admit card will be released on January 15, 2025. 

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