UPES B.Tech Admissions 2025
ApplyRanked #42 among Engineering colleges in India by NIRF | Highest CTC 50 LPA , 100% Placements
Exam GATE | Seats 18 |
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in VLSI and Embedded Systems Design is a two-year full-time postgraduate Course offered by The Oxford College of Engineering, Bangalore recognized by All India Council for Technical Education (AICTE) and affiliated to Visvesvaraya Technological University, Belagavi.
Exams and Events | Dates |
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GATE Score Card Date - Score cards available for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'24 - 30 Dec'24 |
GATE Admit Card Date (Mode - Online) | 1 Jan'25 - 1 Jan'25 |
GATE Exam Date (Mode - Online) | 31 Jan'25 - 1 Feb'25 |
GATE Exam Date (Mode - Online) | 14 Feb'25 - 15 Feb'25 |
GATE Result Date (Mode - Online) | 18 Mar'25 - 18 Mar'25 |
GATE Score Card Date (Mode - Online) | 27 Mar'25 - 30 May'25 |
GATE Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'25 - 30 Dec'25 |
Pass in BE/B.Tech in the relevant discipline with not less than 50% marks in aggregate of all the semesters/years (a cumulative sum of secured marks of all the semesters/years divided by the sum of the maximum marks) In case of Karnataka SC/ST/Cat-1 candidate, the marks shall not be less than 45% & secured rank in national level entrance test GATE/PGCET.
The students are admitted to the Oxford College of Engineering on Karnataka PGCET and GATE merit.
Ranked #42 among Engineering colleges in India by NIRF | Highest CTC 50 LPA , 100% Placements
Ranked #1 Among all Private Indian Universities In QS Asia Rankings 2025 | Scholarships worth 210 CR
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National level exam conducted by VIT University, Vellore | Ranked #11 by NIRF for Engg. | NAAC A++ Accredited